KernelScan.io

HIGH

pci dwc MSIWrite Race

CVE-2026-90332

CVSS 8.2 / 10.0 NVD

CVSS:3.1/AV:A/AC:L/PR:N/UI:N/S:C/C:N/I:L/A:H

KernelScan AI4.5MEDIUM

01

In the Linux kernel, the following vulnerability has been resolved: PCI: dwc: ep: Flush cached MSI write before unmapping the iATU The MSI-X path already flushes any posted MSI-X write before tearing down its iATU mapping. That was added by commit c22533c66cca ("PCI: dwc: ep: Flush MSI-X write before unmapping its ATU entry") to make sure the write reaches the Root Complex before the outbound window that translates it disappears. The MSI path has the same problem but no equivalent flush. When the Endpoint driver caches an MSI target address and later observes that the Root Complex has changed it, dw_pcie_ep_raise_msi_irq() unmaps the existing iATU entry and reprograms it for the new address. Between the last MSI writel() and the unmap there may still be a posted write sitting in the fabric, and unmapping the iATU entry can drop or misroute that write. Fix this by reading back from the mapped MSI window before the unmap. The readback drains any posted MSI writes through the same iATU entry that mapped them, which is the same logic the MSI-X path uses. [mani: commit log]

02

Engine v0.6.0

Risk summary

Devices using a DesignWare PCIe endpoint controller can lose or misroute MSI interrupts when the host reconfigures the MSI Message Address while a posted write is still in flight. The primary impact is a denial of service: the host may hang waiting for an interrupt that was silently dropped. This requires specific PCIe hardware and a privileged host-side address reconfiguration to trigger.

Affecteddrivers/pci/controller/dwc/pcie-designware-ep.c (PCI DesignWare Endpoint Controller)

Vulnerability analysis

When the host Root Complex changes the MSI target address, the DesignWare PCIe endpoint driver tears down the existing outbound iATU mapping and reprograms it for the new address. A posted MSI write may still be sitting in the PCIe fabric at that point, and unmapping the iATU entry before the write has drained can cause it to be dropped or misrouted, leaving the host waiting for an interrupt that never arrives. The fix adds a readback from the mapped MSI window before the unmap, which flushes any in-flight posted writes through the same iATU entry so they reach the host before the translation window disappears. This issue is reachable only on systems with a DesignWare PCIe endpoint controller, and the triggering condition—a host-side reconfiguration of the MSI Message Address—is a privileged operation on the host, not something an unprivileged local process can initiate.

03

BranchIntroducedFixed inPatch commit
6.196.19.76.20914704c7b318
7.2—7.2.61b01d725d8b4
mainline—7.3—