HIGH Introduced in 6.11
vt-d ContextFlush UAF
CVE-2026-90240
CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:C/C:H/I:H/A:H
KernelScan AI6.7MEDIUM
01Description
In the Linux kernel, the following vulnerability has been resolved: iommu/vt-d: Flush context cache with correct SID when tearing down aliases domain_context_clear_one() and device_pasid_table_teardown() are both invoked once per DMA alias of a device. Each function locates the context entry using the bus/devfn pair provided by the pci_for_each_dma_alias() callback, then calls intel_context_flush_no_pasid(), which constructs a device-selective context-cache invalidation from info->bus and info->devfn (that is, always the requester ID of the device itself). As a result, for every alias other than the device’s own RID, the context entry that was just cleared in memory is never invalidated in the context cache. Hardware may continue using that stale cached entry. In the scalable-mode teardown path, intel_pasid_free_table() can then free the PASID directory still referenced by that stale entry, allowing the IOMMU to walk freed memory. Fix this by passing the source ID of the entry being torn down to intel_context_flush_no_pasid(), instead of deriving it from @info.
02KernelScan AI Analysis
Risk summary
When a PCI device with DMA aliases is detached from an IOMMU domain, the Intel VT-d driver flushes the context cache using the device's own requester ID instead of the alias's source ID. Stale context-cache entries for non-RID aliases persist in hardware, allowing the IOMMU to walk PASID directory memory that has already been freed. This is a local-only issue triggered during device teardown on systems with Intel VT-d IOMMU hardware.
Vulnerability analysis
When a PCI device with DMA aliases is removed from an IOMMU domain, the Intel VT-d driver clears each alias's translation context in memory but tells the hardware to flush the wrong device identity from its cache. For every alias except the device's own address, the stale cache entry remains active and may continue to point to a translation table that is later freed, causing the memory management hardware to use freed memory. The fix ensures the cache flush targets the exact alias being removed so the hardware cache stays consistent with memory. The issue can be reached locally through device teardown operations on systems using Intel VT-d hardware.
Lifecycle
03Fix Versions
| Branch | Introduced | Fixed in | Patch commit |
|---|---|---|---|
| 6.18 | 6.11 | 6.18.52 | a803141597d6 |
| mainline | 6.11 | 7.3-rc1 | c54e4ae971b9 |
| 7.2 | 6.11 | 7.2.6 | 5baddf100b3b |