HIGH Introduced in 6.10
bpf PerCpuAddr Corruption
CVE-2026-89581
CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:H/A:H
KernelScan AI8.5HIGH
01Description
In the Linux kernel, the following vulnerability has been resolved: bpf, x86: Fix per-CPU address resolution into an extended register The destination of the per-CPU address MOV is encoded in ModRM.reg, which is extended by REX.R, but the REX prefix is built with add_1mod(), which sets REX.B. REX.B extends ModRM.rm and SIB.base, and this instruction addresses memory as disp32 with no base, so the bit has no effect at all and the high register bit is simply lost. Every is_ereg() destination therefore resolves to the wrong register, picking whichever one shares the low three bits: R5 -> RAX R7 -> RBP R8 -> RSI R9 -> RDI With BPF_REG_5, whose reg2hex is 0, the emitted 65 49 03 04 25 <off> add %gs:<off>,%rax adds the per-CPU offset to RAX rather than R8. The destination keeps the unadjusted address and RAX is clobbered, so the program goes on to dereference a pointer that was never made per-CPU: BUG: unable to handle page fault for address: 0000607e386a8894 RIP: bpf_prog_707837aafd2aa9ae_update_percpu_data+0x93/0xc9 Call Trace: __bpf_prog_test_run_raw_tp+0x2dc/0x7d0 __flush_smp_call_function_queue+0x1e9/0xc80 Kernel panic - not syncing: Fatal exception in interrupt R5 is the mildest of the four, aliasing a scratch register and faulting at the store. R7 aliases RBP and would corrupt the frame pointer, R8 and R9 alias the argument registers. Use add_2mod() so the register goes through REX.R, matching how add_2reg() places it in ModRM.reg and how emit_priv_frame_ptr() hardcodes 0x4c for the same instruction with R9. Encodings for the non-extended registers are unchanged. Problem showed up when trying to resurrect BPF_GCC CI (selftests built with BPF_GCC). This has gone unnoticed because clang reloads the address into R1 before each per-CPU access, so the destination is never an extended register. GCC keeps several per-CPU addresses live at once, and test_progs-bpf_gcc panics the kernel in global_percpu_data/init, where the address of a .percpu variable ends up in R5.
02KernelScan AI Analysis
Risk summary
A code-generation defect in the x86 BPF JIT causes per-CPU address resolution to target the wrong CPU register for extended registers (R8–R15), leading to kernel panic or memory corruption when the affected BPF program executes. Any local user who can load a BPF program—including unprivileged users with user-namespace access to CAP_BPF—can trigger this. Multi-tenant and container-host deployments are at elevated risk because a tenant or container can panic or corrupt the shared host kernel.
Vulnerability analysis
The x86 BPF JIT compiler builds machine code incorrectly when resolving per-CPU addresses for certain destination registers. The bit that selects the high register number is placed in the wrong part of the instruction encoding, so it is ignored. The per-CPU offset is then added to the wrong register entirely, leaving the intended destination with an unadjusted address and corrupting whichever register was mistakenly targeted. The BPF program continues using the unadjusted pointer, causing a kernel page fault and panic, or silent memory corruption depending on how the affected register is used. The fix moves the register-selection bit to the correct position so the per-CPU offset is applied to the intended destination. The vulnerable path is reached when a BPF program that accesses per-CPU data is loaded and JIT-compiled; this requires CAP_BPF, which on most systems an unprivileged local user can obtain through a user namespace.
Lifecycle
03Fix Versions
| Branch | Introduced | Fixed in | Patch commit |
|---|---|---|---|
| 6.12 | 6.10 | 6.12.109 | 638bc3aada8e |
| 6.18 | 6.10 | 6.18.50 | 6886642414f5 |
| 7.2 | 6.10 | 7.2.4 | 6a19b18d4588 |
| mainline | 6.10 | 7.3-rc1 | 5bbbce02e500 |