HIGH Introduced in 6.17
iommu VSid Bypass
CVE-2026-89450
CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:C/C:H/I:H/A:H
KernelScan AI5.3MEDIUM
01Description
In the Linux kernel, the following vulnerability has been resolved: iommu/tegra241-cmdqv: Reject a vSID wider than the SID_MATCH field tegra241_vintf_init_vsid() programs the guest-provided vSID into SID_MATCH, whose VIRT_SID field spans bits [20:1] with bit 0 as the match-enable flag. The HW therefore matches only a 20-bit Stream ID. The bound check rejects only virt_sid > UINT_MAX, which admits a value far wider than the field. The write "virt_sid << 1 | 0x1" then drops every bit above 20: a virt_sid of 0x80000000 lands as SID_MATCH = 0x1, a valid match on vSID 0, so the entry aliases the wrong Stream ID. Because vdev->virt_id is guest-controlled, a VMM can trigger it. Validate virt_sid against the field width with FIELD_MAX(), and program the register with FIELD_PREP() so the value and the field stay consistent.
02KernelScan AI Analysis
Risk summary
A VMM managing a guest on NVIDIA Tegra241 hardware can pass a guest-controlled virtual Stream ID wider than the hardware matching field, causing it to silently alias a different Stream ID. This can misroute the guest's IOMMU cache-invalidation commands to the wrong physical device or leave stale translation cache entries. An untrusted guest can exploit this through a trusted VMM that has IOMMU device access.
Vulnerability analysis
A virtual machine manager can pass a guest-supplied virtual Stream ID to the kernel's Tegra241 IOMMU command-queue driver, which programs it into a hardware matching field only 20 bits wide. The original validation rejected only values exceeding 32 bits, so any value between 21 and 32 bits was silently truncated when written, causing the entry to match a different Stream ID — for example, a large value would alias Stream ID 0. This mismatch can route the guest's cache-invalidation commands to the wrong physical device or leave stale translation cache entries for the intended device. The fix tightens the bound check to the actual field width and programs the register through a helper that enforces field-width consistency. The bug is reachable from a VMM with access to the IOMMU device file, and the triggering input is guest-controlled, so an untrusted guest can exploit it through a trusted VMM. It requires NVIDIA Tegra241 (Grace) hardware with the command-queue virtualization feature enabled.
Lifecycle
03Fix Versions
| Branch | Introduced | Fixed in | Patch commit |
|---|---|---|---|
| 7.2 | 6.17 | 7.2.4 | 445204550f89 |
| mainline | 6.17 | 7.3-rc1 | 4379610c79bd |
| 6.18 | 6.17 | 6.18.50 | d903d99ffd22 |