KernelScan.io

HIGH Introduced in 6.2

cxl HeaderLog OOB Read

CVE-2026-80662

CVSS 7.1 / 10.0 NVD

CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:N/A:H

KernelScan AI5.5MEDIUM

01

In the Linux kernel, the following vulnerability has been resolved: cxl: Fix CXL_HEADERLOG_SIZE to match RAS Capability size The CXL r4.0 8.2.4.17.7 RAS Capability Structure has total length 0x58 bytes (CXL_RAS_CAPABILITY_LENGTH); the Header Log occupies the trailing 64 bytes at offset 0x18. CXL_HEADERLOG_SIZE was defined as SZ_512, eight times the actual on-device size. header_log_copy() reads CXL_HEADERLOG_SIZE_U32 (128) dwords from the RAS capability iomap, overrunning the 88-byte mapping by 448 bytes. The cxl_aer_uncorrectable_error trace event memcpy()s CXL_HEADERLOG_SIZE (512) bytes from its source. For the CPER caller the source is struct cxl_ras_capability_regs::header_log[16] (64 bytes) embedded in a stack-local cxl_cper_prot_err_work_data, so the memcpy reads 448 bytes of kernel stack into the trace event ring buffer where userspace can read it via tracefs. Set CXL_HEADERLOG_SIZE to 64 and derive CXL_HEADERLOG_SIZE_U32 from it, bringing all iomap readers into agreement on 16 dwords. Userspace tools such as rasdaemon have grown a dependency on the buggy 512-byte (128 u32) header_log layout in the cxl_aer_uncorrectable_error trace event. Add CXL_HEADERLOG_TRACE_SIZE_U32 = 128 and use it for the trace event __array and its memcpy to preserve that ABI. Both callers now pass a zero-filled u32[CXL_HEADERLOG_TRACE_SIZE_U32] staging buffer with only the first CXL_HEADERLOG_SIZE_U32 (16) entries populated from hardware; the remaining 112 u32s are zero-padded, keeping the 512-byte trace ring buffer layout intact. [ dj: Replaced 64 with SZ_64 per RichardC ]

02

Engine v0.6.0

Risk summary

A size constant for the CXL RAS header log was defined eight times larger than the actual hardware register block, causing the error-handling path to read past the end of an MMIO mapping and copy adjacent kernel stack into a tracefs ring buffer readable by userspace. Any local user with access to tracefs can recover leaked kernel memory when a CXL device reports an uncorrectable error. The fix corrects the constant to 64 bytes while preserving the existing 512-byte trace-event ABI by zero-padding a staging buffer.

Affecteddrivers/cxl/core/ras.c (CXL RAS)

Vulnerability analysis

The CXL error-handling code used a wrong size constant for reading hardware RAS status, making it fetch 512 bytes from a register block that only holds 88 bytes. When processing an uncorrectable error from a CXL device, the extra bytes came from whatever lay beyond the MMIO window. In one code path, a stack buffer was also copied with the same oversize, so 448 bytes of kernel stack were placed into a trace event that userspace can read through tracefs. The fix reduces the hardware read to the correct 64 bytes and uses a separate, larger staging buffer for the trace ABI so no out-of-bounds data is touched. The bug fires whenever a CXL device reports an uncorrectable error; users with local access to tracefs can then retrieve the leaked bytes.

03

BranchIntroducedFixed inPatch commit
6.126.26.12.114e3e8f3b760bc
6.186.26.18.426fc1919a6f2e
6.66.26.6.160d031617045dc
7.16.27.1.5fc5eb0962a5e
mainline6.27.2c268f949e219

04

State of the newest release of each Civil Infrastructure Platform SLTS tree, from CIP's own fix records.

CIP treeState
cip/6.12Affected — no CIP fix yet (latest 6.12.112-cip33)